Informatics Publishing Limited

T. Karthik ¹, K. Rajkumar ¹

Affiliations
1 School of Computing, SASTRA University, Thanjavur-613401, Tamilnadu, IN

Abstract

Network Optimization techniques are generally used for e data transfer quickly and without loss. Network Optimization is also applied on the power consumption in whole network system. Thus the efficient network system concentrates on Power Utilization, Deadlock Lock avoidance and Error Recovery process. In the Dynamic Power Management System contains Power utilization and its management. In the network consist of various nodes that to be used. The Power consumption takes place high if all nodes are in active state. To manage the Power Consumption in the network, Link Node Heuristic Algorithm is applied as the optimization technique. The Algorithms work with the optimization module that nodes are not used for particular time period means switched to idle state; when the node becomes active to transfer the data then it is changed to awaken state. During data transmission, the router is set all node values either as on or off state. In the proposed module the efficient power consumption network is focused only on energy utilization. Consider for a good power consumption network is only focused in power means the network may get chances for error and deadlock occurrence. During the data transfer some packets is dropped means on that time Autonomous Network Reconfiguration System is used to recover the data. This ARS technique is mainly focused on the error recovery and to avoid the deadlock. Every node is maintained and monitored by the Router in this technique. If the data transmission is takes place for sender and receiver means router allocates the path, make the nodes available and rest of the nodes make in disabled state.

Keywords

ARS Technique, Deadlock Avoidance, ECONET Consortium, Error Recovery, Network Construction, Power Management

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B. Jyothi ¹, M. Venu Gopala Rao ¹, T. Karthik ¹

Affiliations
1 EEE Department, KL University, Greenfields, Vaddeswaram, Guntur (District) - 522502, Andhra Pradesh, IN

Abstract

Output total harmonic distortion of the five phase inverter topologies and corresponding dynamic performance of five phase induction motor are investigated in this paper. Four types of five phase inverter topologies are simulated by using direct pulse and sinusoidal pulse width modulation methods for the inverter control. Arbitrary reference frame method has been employed to model a five phase induction motor. Special transformer connection can be used to transform the available three phase grid supply to five phases but it requires more space, frequent maintenance and high cost so inverters are preferred. Four types of five phase inverter topologies and induction motor modeling are implemented by MATLAB/Simulink. These multi-phases (more than three phases) find applications where reliability and high output power are main concern for example: ship propulsion systems, hybrid electric vehicles.

Keywords

Diode Clamped Multilevel Inverter, Five Phase Induction Motor, Five Phase Supply, Reversing Voltage Multilevel Inverter, Switching Sequence, SPWM Technique, Ten-Step VSI, Total Harmonic Distortion, 1800 Pulses.

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